Konstantinos Kanellopoulos
Computer Architect
Senior Researcher @ SAFARI Research Group - ETH Zurich
Bio
I am a computer architect. I recently completed my PhD at ETH Zurich (defended May 2026), advised by Prof. Onur Mutlu in the SAFARI Research Group. Before that, I received my Diploma (5-year integrated Master's) in Electrical and Computer Engineering from the National Technical University of Athens (NTUA) in Greece. My work has appeared at venues such as MICRO, ISCA, ASPLOS, HPCA, and DSN, and some of it has received best-paper and artifact recognitions.
Research vision. My research is driven by a deep interest in application–OS–hardware co-design, which I believe offers a powerful path toward building high-performance, energy-efficient, programmable, and predictable computer systems. I am particularly interested in rethinking how applications, operating systems, and hardware work together, rather than optimizing each layer in isolation. I currently focus on three closely connected challenges: (i) redesigning how computers manage memory so that modern data-intensive applications execute efficiently without giving up compatibility or ease of programming; (ii) rethinking processor design for the AI era, where modern workloads increasingly rely on the CPU and operating system for critical services such as memory management, scheduling, and communication; and (iii) building the systems foundations for Physical AI, where computers control robots and other machines in the real world and where timely, predictable execution is essential for safety.
On the academic job market. I am applying for tenure-track faculty positions in the 2026/2027 cycle. If you think there might be a good fit at your department, or you'd simply like to chat about my research, please reach out at konkanello@gmail.com. I would love to hear from you.
Beyond research. In my free time, I really enjoy cooking, watching movies, playing tennis (and sometimes padel), and appreciating or practicing forms of art on the electric guitar and the piano. Lately, I relate a lot to this poem by Cavafy, “Ithaka.”
Ithaka by Cavafy
Ελληνικά Original
Σα βγεις στον πηγαιμό για την Ιθάκη,
να εύχεσαι νά ’ναι μακρύς ο δρόμος,
γεμάτος περιπέτειες, γεμάτος γνώσεις.
Τους Λαιστρυγόνας και τους Κύκλωπας,
τον θυμωμένο Ποσειδώνα μη φοβάσαι,
τέτοια στον δρόμο σου ποτέ σου δεν θα βρεις,
αν μέν’ η σκέψις σου υψηλή, αν εκλεκτή
συγκίνησις το πνεύμα και το σώμα σου αγγίζει.
Τους Λαιστρυγόνας και τους Κύκλωπας,
τον άγριο Ποσειδώνα δεν θα συναντήσεις,
αν δεν τους κουβανείς μες στην ψυχή σου,
αν η ψυχή σου δεν τους στήνει εμπρός σου.
Να εύχεσαι νά ’ναι μακρύς ο δρόμος.
Πολλά τα καλοκαιρινά πρωιά να είναι
που με τι ευχαρίστησι, με τι χαρά
θα μπαίνεις σε λιμένας πρωτοειδωμένους·
να σταματήσεις σ’ εμπορεία Φοινικικά,
και τες καλές πραγμάτειες ν’ αποκτήσεις,
σεντέφια και κοράλλια, κεχριμπάρια κ’ έβενους,
και ηδονικά μυρωδικά κάθε λογής,
όσο μπορείς πιο άφθονα ηδονικά μυρωδικά·
σε πόλεις Αιγυπτιακές πολλές να πας,
να μάθεις και να μάθεις απ’ τους σπουδασμένους.
Πάντα στον νου σου νά ’χεις την Ιθάκη.
Το φθάσιμον εκεί είν’ ο προορισμός σου.
Αλλά μη βιάζεις το ταξείδι διόλου.
Καλλίτερα χρόνια πολλά να διαρκέσει·
και γέρος πια ν’ αράξεις στο νησί,
πλούσιος με όσα κέρδισες στον δρόμο,
μη προσδοκώντας πλούτη να σε δώσει η Ιθάκη.
Η Ιθάκη σ’ έδωσε τ’ ωραίο ταξείδι.
Χωρίς αυτήν δεν θά ’βγαινες στον δρόμο.
Άλλα δεν έχει να σε δώσει πια.
Κι αν πτωχική την βρεις, η Ιθάκη δεν σε γέλασε.
Έτσι σοφός που έγινες, με τόση πείρα,
ήδη θα το κατάλαβες οι Ιθάκες τι σημαίνουν.
English Rendering
When you set out on your journey to Ithaka,
wish for the road to stretch far,
rich in adventures, rich in things to learn.
The Laestrygonians and the Cyclopes,
angry Poseidon—do not fear them;
you will never find such beings on your way
if your thought remains lofty, if an exquisite
feeling touches your spirit and body.
The Laestrygonians and the Cyclopes,
fierce Poseidon—you will not encounter them
unless you carry them within your soul,
unless your soul sets them before you.
Wish for the road to stretch far.
May there be many summer mornings
when, with what pleasure, with what joy,
you enter harbors seen for the first time;
may you stop at Phoenician markets
and acquire their fine wares:
mother-of-pearl and coral, amber and ebony,
and sensuous fragrances of every kind—
as many sensuous fragrances as you can;
may you visit many Egyptian cities
to learn, and learn again, from the learned.
Always keep Ithaka in your mind.
To arrive there is your destination.
But do not hurry the journey at all.
Better for it to last many years,
and for you, old by then, to anchor at the island,
rich with all you gained along the way,
with no expectation that Ithaka will grant you riches.
Ithaka gave you the beautiful journey.
Without her, you would never have taken to the road.
She has nothing else to give you now.
And if you find her poor, Ithaka did not deceive you.
Wise as you have become, with so much experience,
by then you will have understood what Ithakas mean.
Independent English rendering from Cavafy’s Greek original. Read the Keeley–Sherrard translation at Poetry Foundation.
News
- July 2026 I gave invited talks on my thesis work, Cutting Through the Virtual Memory Wall, at MIT and NYU, following a remote talk at the ACCESS seminar in June.
- July 2026 Two of our papers have been accepted at MICRO 2026: Terracotta: Enabling DRAM Techniques via a Flexible DRAM Interface and Memory Controller and Trail: Effective, Low-Cost and Scalable Temporal TLB Prefetching via Page-Table-Embedded Deltas. Congrats to the teams!
- May 2026 I successfully defended my PhD! My thesis, Cutting Through the Virtual Memory Wall: From Rigid Abstractions to High-Performance, Flexible, Efficient Cooperation Between Hardware and System Software, was defended on May 26, 2026 at ETH Zurich. See the announcement.
- April 2026 Our works Revelator and ColumnKeeper have been accepted at ISCA 2026!
- March 2026 We hosted the Virtuoso ASPLOS 2026 workshop and tutorial and released Virtuoso 1.1 with expanded infrastructure, documentation, and workshop material.
- February 2026 Our paper Athena was accepted at HPCA 2026 and received a Distinguished Artifact Award.
- January 2026 We released the Athena preprint on synergizing data prefetching and off-chip prediction via online reinforcement learning.
Show older news
- August 2025 We released a preprint of Revelator, our latest work on OS-driven hash-based speculative address translation.
- July 2025 Our paper on leaking information through RowHammer defenses has been accepted at MICRO 2025. Congrats to Nisa and the team. Take a look at the paper.
- March 2025 I interned at Microsoft Research in Cambridge, UK, working on system design for Physical AI applications under the supervision of Bozidar Radunovic and Xenofon Foukas.
- March 2025 Our paper on the security implications of processing-in-memory has been accepted at DSN 2025. Very excited to co-lead this work with Nisa Bostanci. The paper is available here.
- February 2025 Our work on a new simulation methodology and infrastructure for fast, accurate and developer-friendly simulation of virtual memory has been accepted at ASPLOS 2025. This work has been 3 years in the trenches, and I am very excited to see it come to fruition. Congrats to the team and special shoutout to Konstantinos Sgouras whose work was instrumental in this project. See the paper and project page.
- November 2024 Our paper on suspicious thread throttling to reduce Rowhammer defense overheads has been accepted at MICRO 2024. Congrats to Oguzhan and the team!
- July 2024: Our paper "Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution" by Rahul Bera et al. received the Best Paper Award at ISCA 2024. Congrats to Rahul and co-authors!
- November 2023: Our paper "Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources" by Konstantinos Kanellopoulos et al. received the Distinguished Artifact Award at MICRO 2023. Congrats team! Take a look at the paper and the source code.
- October 2022: Our paper "Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction" by Rahul Bera et al. received the Best Paper Award at MICRO 2022. Many congrats to Rahul and co-authors! Take a look at the paper.
Education
ETH Zurich — D-ITET
Sep 2020 – Present
PhD (defended May 2026)
Hardware-software-OS cooperative techniques, advised by Prof. Onur Mutlu @ SAFARI Research Group
ETH Zurich — D-INFK
2018 – 2020
Research Internship
Advised by Prof. Onur Mutlu and Prof. Nandita Vijaykumar @ SAFARI Research Group
NTUA
2012 – 2017
Integrated Master's Degree
National Technical University of Athens, School of Electrical and Computer Engineering
Professional Experience
Microsoft Research Cambridge, UK
Jun – Sep 2025
Research Intern
Hardware/OS co-design for efficient scheduling of Physical AI applications
Huawei Zurich Research Center
Jan – Dec 2022
Visiting Researcher
Microarchitecture optimizations for the address-translation subsystem
Huawei Zurich Research Center
Jan – Sep 2021
Visiting Researcher
Microarchitecture optimizations for the address-translation subsystem
Awards & Honors
- 2026 Distinguished Artifact Award at HPCA — Athena: Synergizing Data Prefetching and Off-Chip Prediction via Online Reinforcement Learning
- 2024 SIGMICRO Hall of Fame (included after 8 MICRO publications)
- 2024 Qualcomm Innovation Fellowship Europe, Finalist (18 of 62 proposals selected)
- 2024 Best Paper Award at ISCA — Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution
- 2023 Best Paper Award at HiPEAC — MetaSys: A Practical Open-source Metadata Management System
- 2023 Distinguished Artifact Award at MICRO — Victima: Drastically Increasing Address Translation Reach
- 2023 MICRO Student Research Competition, 3rd Place (Graduate Category)
- 2022 Best Paper Award at MICRO — Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction
- 2022 Intel Hardware Security Academic Award, Finalist — BlockHammer
- 2012 “The Great Moment for Education” Eurobank Scholarship, awarded for the best performance in the Greek national qualification exams
Publications
Most recent publications on Google Scholar and DBLP.
* indicates equal contribution.
Trail: Effective, Low-Cost and Scalable Temporal TLB Prefetching via Page-Table-Embedded Deltas
Konstantinos Kanellopoulos, Konstantinos Sgouras, Harsh Songara, Rahul Bera, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, 2026
Officially artifact evaluated as available, functional, and reproduced.
Terracotta: Enabling DRAM Techniques via a Flexible DRAM Interface and Memory Controller
Harsh Songara, Konstantinos Kanellopoulos, F. Nisa Bostanci, Konstantinos Sgouras, Ataberk Olgun, Ismail Emir Yuksel, Andreas Kosmas Kakolyris, Abdullah Giray Yaglikci, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, 2026
Officially artifact evaluated as available, functional, and reproduced.
Revelator: Rapid Data Fetching via System-Software-Guided Hash-based Speculative Address Translation
Konstantinos Kanellopoulos, Konstantinos Sgouras, Harsh Songara, Andreas Kosmas Kakolyris, Vlad-Petru Nitu, Spiros Galanopoulos, Rahul Bera, Konstantina Koliogeorgi, Rakesh Kumar, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Raleigh, North Carolina, USA, 2026
ColumnKeeper: Efficient Solutions for Mitigating ColumnDisturb in DRAM-based Systems
Andreas Kosmas Kakolyris, F. Nisa Bostanci, Ataberk Olgun, Ismail Emir Yuksel, Konstantinos Marios Sgouras, Harsh Songara, Umut Baser, Konstantinos Kanellopoulos, A. Giray Yaglikci, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Raleigh, North Carolina, USA, 2026
Officially artifact evaluated as available, functional, and reproduced.
Athena: Synergizing Data Prefetching and Off-Chip Prediction via Online Reinforcement Learning Distinguished Artifact Award
Rahul Bera, Zhenrong Lang, Caroline Hengartner, Konstantinos Kanellopoulos, Rakesh Kumar, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Sydney, Australia, 2026
Officially artifact evaluated as available, functional, and reproduced.
SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis
Nika Mansouri-Ghiasi, Tolga Güloğlu, Harun Mustafa, Can Firtina, Konstantina Koliogeorgi, Konstantinos Kanellopoulos, Haiyu Mao, Rohan Nadig, Mohammad Sadrosadati, Jisung Park, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Sydney, Australia, 2026
Revisiting Main Memory-Based Covert and Side Channel Attacks in the Context of Processing-in-Memory
F. Nisa Bostanci*, Konstantinos Kanellopoulos*, Ataberk Olgun, Abdullah Giray Yaglikçi, Ismail Emir Yuksel, Nika Mansouri-Ghiasi, Zülal Bingöl, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Naples, Italy, 2025
Officially artifact evaluated as available, reviewed, and reproduced.
Virtuoso: Enabling Fast and Accurate Virtual Memory Research via an Imitation-based Operating System Simulation Methodology
Konstantinos Kanellopoulos, Konstantinos Sgouras, F. Nisa Bostanci, Andreas Kosmas Kakolyris, Berkin K. Konar, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Nandita Vijaykumar, and Onur Mutlu
In Proceedings of the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Rotterdam, The Netherlands, 2025
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution Best Paper Award
Rahul Bera, Aditya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Buenos Aires, Argentina, 2024
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
F. Nisa Bostanci, Ismail Emir Yuksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, Abdullah Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Edinburgh, Scotland, 2024
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources Distinguished Artifact Award
Konstantinos Kanellopoulos, Hong Chul Nam, F. Nisa Bostanci, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Davide Basilio Bartolini, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Canada, 2023
Officially artifact evaluated as available, functional, reusable and reproducible.
Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping
Konstantinos Kanellopoulos, Rahul Bera, Kosta Stojiljkovic, F. Nisa Bostanci, Can Firtina, Rachata Ausavarungnirun, Rakesh Kumar, Nastaran Hajinazar, Mohammad Sadrosadati, Nandita Vijaykumar, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Canada, 2023
MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations Best Paper Award at HiPEAC 2023
Nandita Vijaykumar, Ataberk Olgun, Konstantinos Kanellopoulos, F. Nisa Bostanci, Hasan Hassan, Mehrshad Lotfi, Phillip B. Gibbons, Onur Mutlu
In ACM Transactions on Architecture and Code Optimization (TACO), 2022
SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
Damla Senol Cali, Konstantinos Kanellopoulos, Joël Lindegger, Zülal Bingöl, Gurpreet S. Kalsi, Ziyi Zuo, Can Firtina, Meryem Banu Cavlak, Jeremie S. Kim, Nika Mansouri-Ghiasi, Gagandeep Singh, Juan Gómez-Luna, Nour Almadhoun Alserr, Mohammed Alser, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), New York, New York, USA, 2022
Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction Best Paper Award
Rahul Bera, Konstantinos Kanellopoulos, Shankar Balachandran, David Novo, Ataberk Olgun, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Chicago, Illinois, USA, 2022
Officially artifact evaluated as available, functional, and reproduced.
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows Intel Hardware Security Academic Award Finalist
Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Virtual, 2021
SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems
Maciej Besta, Raghavendra Kanakagiri, Grzegorz Kwasniewski, Rachata Ausavarungnirun, Jakub Beránek, Konstantinos Kanellopoulos, Kacper Janda, Zur Vonarburg-Shmaria, Lukas Gianinazzi, Ioana Stefan, Juan Gómez-Luna, Jakub Golinowski, Marcin Copik, Lukas Kapp-Schwoerer, Salvatore Di Girolamo, Nils Blach, Marek Konieczny, Onur Mutlu, Torsten Hoefler
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Virtual, 2021
Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning
Rahul Bera, Konstantinos Kanellopoulos, Anant Nori, Taha Shahroodi, Sreenivas Subramoney, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Virtual, 2021
Officially artifact evaluated as available, functional, and reproduced.
SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations
Konstantinos Kanellopoulos, Nandita Vijaykumar, Christina Giannoula, Roknoddin Azizi, Skanda Koppula, Nika Mansouri-Ghiasi, Taha Shahroodi, Juan Gómez-Luna, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Columbus, Ohio, USA, 2019
Valinor: Architectural Support for Fast, Energy-Efficient and Programmable Physical Memory Allocation
Konstantinos Kanellopoulos, Spyros Galanopoulos, Konstantinos Sgouras, Vlad-Petru Nitu, Ioanna Papalampou, Andreas Kosmas Kakolyris, Rahul Bera, Konstantina Koliogeorgi, Dimosthenis Masouros, Dimitrios Soudris, Onur Mutlu
arXiv preprint, 2026 (under review)
Trail: Effective, Low-Cost and Scalable Temporal TLB Prefetching via Page-Table-Embedded Deltas
Konstantinos Kanellopoulos, Konstantinos Sgouras, Harsh Songara, Rahul Bera, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, 2026
Officially artifact evaluated as available, functional, and reproduced.
Terracotta: Enabling DRAM Techniques via a Flexible DRAM Interface and Memory Controller
Harsh Songara, Konstantinos Kanellopoulos, F. Nisa Bostanci, Konstantinos Sgouras, Ataberk Olgun, Ismail Emir Yuksel, Andreas Kosmas Kakolyris, Abdullah Giray Yaglikci, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Athens, Greece, 2026
Officially artifact evaluated as available, functional, and reproduced.
Revelator: Rapid Data Fetching via System-Software-Guided Hash-based Speculative Address Translation
Konstantinos Kanellopoulos, Konstantinos Sgouras, Harsh Songara, Andreas Kosmas Kakolyris, Vlad-Petru Nitu, Spiros Galanopoulos, Rahul Bera, Konstantina Koliogeorgi, Rakesh Kumar, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Raleigh, North Carolina, USA, 2026
ColumnKeeper: Efficient Solutions for Mitigating ColumnDisturb in DRAM-based Systems
Andreas Kosmas Kakolyris, F. Nisa Bostanci, Ataberk Olgun, Ismail Emir Yuksel, Konstantinos Marios Sgouras, Harsh Songara, Umut Baser, Konstantinos Kanellopoulos, A. Giray Yaglikci, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Raleigh, North Carolina, USA, 2026
Officially artifact evaluated as available, functional, and reproduced.
Argus: Agentic, Reference-Calibrated, Tree-Guided, System-Software-Level Bottleneck Localization
Vlad-Petru Nitu, Harsh Songara, Konstantinos Sgouras, Spyros Galanopoulos, Konstantinos Kanellopoulos, Onur Mutlu
In the Architecture 2.0 Workshop at ISCA, Raleigh, North Carolina, USA, 2026
SAGe: A Lightweight Algorithm-Architecture Co-Design for Mitigating the Data Preparation Bottleneck in Large-Scale Genome Sequence Analysis
Nika Mansouri-Ghiasi, Tolga Güloğlu, Harun Mustafa, Can Firtina, Konstantina Koliogeorgi, Konstantinos Kanellopoulos, Haiyu Mao, Rohan Nadig, Mohammad Sadrosadati, Jisung Park, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Sydney, Australia, 2026
Athena: Synergizing Data Prefetching and Off-Chip Prediction via Online Reinforcement Learning Distinguished Artifact Award
Rahul Bera, Zhenrong Lang, Caroline Hengartner, Konstantinos Kanellopoulos, Rakesh Kumar, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Sydney, Australia, 2026
Officially artifact evaluated as available, functional, and reproduced.
RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
Nika Mansouri-Ghiasi, Mohammad Sadrosadati, Geraldo F. Oliveira, Konstantinos Kanellopoulos, Rachata Ausavarungnirun, Juan Gómez-Luna, Aditya Manglik, João Dinis Ferreira, Jeremie S. Kim, Christina Giannoula, Nandita Vijaykumar, Jisung Park, Onur Mutlu
In ACM Transactions on Architecture and Code Optimization (TACO), 2026
Revisiting Main Memory-Based Covert and Side Channel Attacks in the Context of Processing-in-Memory
F. Nisa Bostanci*, Konstantinos Kanellopoulos*, Ataberk Olgun, Abdullah Giray Yaglikçi, Ismail Emir Yuksel, Nika Mansouri-Ghiasi, Zülal Bingöl, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), Naples, Italy, 2025
Officially artifact evaluated as available, reviewed, and reproduced.
Virtuoso: Enabling Fast and Accurate Virtual Memory Research via an Imitation-based Operating System Simulation Methodology
Konstantinos Kanellopoulos, Konstantinos Sgouras, F. Nisa Bostanci, Andreas Kosmas Kakolyris, Berkin K. Konar, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Nandita Vijaykumar, and Onur Mutlu
In Proceedings of the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Rotterdam, The Netherlands, 2025
BreakHammer: Enhancing RowHammer Mitigations by Carefully Throttling Suspect Threads
Oguzhan Canpolat, Abdullah Giray Yaglikçi, Ataberk Olgun, Ismail Emir Yüksel, Yahya Can Tugrul, Konstantinos Kanellopoulos, Oguz Ergin, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Austin, Texas, USA, 2024
Officially artifact evaluated as available, functional, reusable and reproducible.
Constable: Improving Performance and Power Efficiency by Safely Eliminating Load Instruction Execution Best Paper Award
Rahul Bera, Aditya Ranganathan, Joydeep Rakshit, Sujit Mahto, Anant V. Nori, Jayesh Gaur, Ataberk Olgun, Konstantinos Kanellopoulos, Mohammad Sadrosadati, Sreenivas Subramoney, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Buenos Aires, Argentina, 2024
EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators
Lois Orosa, Skanda Koppula, Yaman Umuroglu, Konstantinos Kanellopoulos, Juan Gómez-Luna, Michaela Blott, Kees A. Vissers, Onur Mutlu
In IEEE Transactions on Computers (TC), 2024
CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost
F. Nisa Bostanci, Ismail Emir Yuksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, Abdullah Giray Yaglikçi, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Edinburgh, Scotland, 2024
Address Scaling: Architectural Support for Fine-Grained Thread-Safe Metadata Management
Deepanjali Mishra, Konstantinos Kanellopoulos, Ashish Panwar, Akshitha Sriraman, Vivek Seshadri, Onur Mutlu, Todd C. Mowry
In IEEE Computer Architecture Letters (CAL), 2023
Virtuoso: An Open-Source, Comprehensive and Modular Simulation Framework for Virtual Memory Research SRC 3rd Place, Graduate Category
Konstantinos Kanellopoulos, Konstantinos Sgouras, Onur Mutlu
In the ACM Student Research Competition at MICRO, Toronto, Canada, 2023
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources Distinguished Artifact Award
Konstantinos Kanellopoulos, Hong Chul Nam, F. Nisa Bostanci, Rahul Bera, Mohammad Sadrosadati, Rakesh Kumar, Davide Basilio Bartolini, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Canada, 2023
Officially artifact evaluated as available, functional, reusable and reproducible.
Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping
Konstantinos Kanellopoulos, Rahul Bera, Kosta Stojiljkovic, F. Nisa Bostanci, Can Firtina, Rachata Ausavarungnirun, Rakesh Kumar, Nastaran Hajinazar, Mohammad Sadrosadati, Nandita Vijaykumar, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Toronto, Canada, 2023
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM
Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu
In ACM Transactions on Architecture and Code Optimization (TACO), 2023
ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems
Nika Mansouri-Ghiasi, Nandita Vijaykumar, Geraldo F. Oliveira, Lois Orosa, Ivan Fernandez, Mohammad Sadrosadati, Konstantinos Kanellopoulos, Nastaran Hajinazar, Juan Gómez-Luna, Onur Mutlu
In IEEE Transactions on Emerging Topics in Computing (TETC), 2023
Evaluating Homomorphic Operations on a Real-World Processing-In-Memory System
Harshita Gupta, Mayank Kabra, Juan Gómez-Luna, Konstantinos Kanellopoulos, Onur Mutlu
In Proceedings of the IEEE International Symposium on Workload Characterization (IISWC), Ghent, Belgium, 2023
MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations Best Paper Award at HiPEAC 2023
Nandita Vijaykumar, Ataberk Olgun, Konstantinos Kanellopoulos, F. Nisa Bostanci, Hasan Hassan, Mehrshad Lotfi, Phillip B. Gibbons, Onur Mutlu
In ACM Transactions on Architecture and Code Optimization (TACO), 2022
SeGraM: A Universal Hardware Accelerator for Genomic Sequence-to-Graph and Sequence-to-Sequence Mapping
Damla Senol Cali, Konstantinos Kanellopoulos, Joël Lindegger, Zülal Bingöl, Gurpreet S. Kalsi, Ziyi Zuo, Can Firtina, Meryem Banu Cavlak, Jeremie S. Kim, Nika Mansouri-Ghiasi, Gagandeep Singh, Juan Gómez-Luna, Nour Almadhoun Alserr, Mohammed Alser, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), New York, New York, USA, 2022
Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction Best Paper Award
Rahul Bera, Konstantinos Kanellopoulos, Shankar Balachandran, David Novo, Ataberk Olgun, Mohammad Sadrosadati, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Chicago, Illinois, USA, 2022
Officially artifact evaluated as available, functional, and reproduced.
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows Intel Hardware Security Academic Award Finalist
Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA), Virtual, 2021
SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems
Maciej Besta, Raghavendra Kanakagiri, Grzegorz Kwasniewski, Rachata Ausavarungnirun, Jakub Beránek, Konstantinos Kanellopoulos, Kacper Janda, Zur Vonarburg-Shmaria, Lukas Gianinazzi, Ioana Stefan, Juan Gómez-Luna, Jakub Golinowski, Marcin Copik, Lukas Kapp-Schwoerer, Salvatore Di Girolamo, Nils Blach, Marek Konieczny, Onur Mutlu, Torsten Hoefler
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Virtual, 2021
Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning
Rahul Bera, Konstantinos Kanellopoulos, Anant Nori, Taha Shahroodi, Sreenivas Subramoney, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Virtual, 2021
Officially artifact evaluated as available, functional, and reproduced.
The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework
Nastaran Hajinazar, Pratyush Patel, Minesh Patel, Konstantinos Kanellopoulos, Saugata Ghose, Rachata Ausavarungnirun, Geraldo F. Oliveira, Jonathan Appavoo, Vivek Seshadri, Onur Mutlu
In Proceedings of the ACM/IEEE International Symposium on Computer Architecture (ISCA), Virtual, 2020
EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM
Skanda Koppula, Lois Orosa, Abdullah Giray Yaglikçi, Roknoddin Azizi, Taha Shahroodi, Konstantinos Kanellopoulos, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Columbus, Ohio, USA, 2019
SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations
Konstantinos Kanellopoulos, Nandita Vijaykumar, Christina Giannoula, Roknoddin Azizi, Skanda Koppula, Nika Mansouri-Ghiasi, Taha Shahroodi, Juan Gómez-Luna, Onur Mutlu
In Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Columbus, Ohio, USA, 2019
Service
Program Committee
- HPCA 2027 (Program Committee Member)
- MICRO 2026 (Program Committee Member)
- HPCA 2026 (Program Committee Member)
Artifact Evaluation Committee
- MICRO 2025
Sub-reviewing
- ISCA 2019–2025 • MICRO 2019–2025 • HPCA 2019–2025 • ASPLOS 2019–2025 • DSN 2023 • DAC 2021 • IEEE Micro Top Picks 2019–2022 • EuroSys 2023
Teaching
- Computer Architecture (MSc), ETH Zurich — Instructor, 2026–Present; Teaching Assistant, 2020–2026
- Design of Digital Circuits (BSc), ETH Zurich — Teaching Assistant, 2019–Present
- Seminar on Computer Architecture (BSc/MSc), ETH Zurich — Teaching Assistant, 2020–Present
- Fundamentals of Computer Architecture (BSc), ETH Zurich — Teaching Assistant, 2024–2025
- Advanced Computer Architecture, NTUA — Teaching Assistant, 2018
- Operating Systems, NTUA — Lab Assistant, 2018
Selected Recorded Lectures & Talks
Virtual Memory (Fall '25)
Prefetching II & VM (Spring '26)
VM Seminar (Spring '26)
Virtual Memory II (Spring '26)
Virtuoso Workshop @ ASPLOS '26
Virtuoso Workshop @ MICRO '25
Organizing
- 4th Data Prefetching Championship (DPC-4) — Co-Organizer, held in conjunction with HPCA 2026, Sydney, Australia
- Virtuoso ASPLOS 2026 Workshop and Tutorial (video) — third edition planned for MICRO 2026
- Virtuoso MICRO 2025 Workshop and Tutorial (video)
- Project and Seminar on Intelligent Architectures, ETH Zurich, 2020–2023